Silicon Canvas Joins Synopsys in-Sync Program
Encapsulates the Layout Verification Process with Synopsys' Hercules
SAN JOSE, Calif., October 30, 2002 - Silicon Canvas, Inc. (SCI), a market leader in full custom layout solutions, today announced it has joined the Synopsys in-Sync® program. Through the in-Sync program, Silicon Canvas' Laker™ full custom layout system will interface with Synopsys' Hercules™ physical verification solution, which offers design rule check (DRC) and layout versus schematic (LVS) verification, to provide mutual customers with a comprehensive set of capabilities required to verify and fix physical design errors.
"The in-Sync program was created to facilitate interoperability between Synopsys tools and other electronic design automation (EDA) vendors' tools in an effort to enable customer design flows to run as smoothly as possible," said Karen Bartleson, director of quality and interoperability at Synopsys, Inc. "Our mutual customers will benefit from an efficient, predictable path between Synopsys' Hercules physical verification solution and Silicon Canvas' Laker layout system."
"Laker is an open system and helping customers to improve tool interoperability is always one of our goals," noted Dr. Hau-Yung Chen, president of Silicon Canvas, Inc. "Hercules is widely recognized as one of the industry standard sign-off DRC/LVS verification tools. When integrated with Laker's high performance and high capacity full custom layout system, customers can visually understand and debug physical design errors and can also easily fix violations in a very productive way. We are glad to join the Synopsys in-Sync program to improve tool interoperability. Overall, our mutual customers will win as a result of programs like in-Sync."
About Laker:
The Laker layout system is the next generation full custom layout solution. It delivers six times productivity gains through automation, performance, capacity, and openness. With its patented Magic Cell and Rule-Driven technology, Laker is the ideal layout solution for memory, analog-mixed signal, test keys, and any high performance design projects. With its optimized high capacity and high performance database, Laker is also a perfect flow plug-in tool for complex ASIC, SoC designs to perform post-P&R tasks, such as merging sub blocks, interfacing with verification tools, efficiently fixing timing closure issues or assembling top-level blocks, including the top cell signal routing, power routing, or any special routing.
Laker is particularly positioned to handle applications such as high performance CPU, embedded controllers, computing systems, network, multimedia, graphics, and communications. Laker is a production proven product and has been used to tape out more than 400 chips ranging from analog mixed signal to multi-million gate SoC designs.
About Silicon Canvas:
Silicon Canvas is the technology leader in providing full custom layout solutions for product and services. Silicon Canvas was founded in 2000 by Dr. Hau-Yung Chen and a number of other EDA veterans with over 50 years of combined industry experience. The company develops a modern, updated, and capable custom layout tool, Laker, to address the growing needs for today's analog, mixed signal, large complex IC, ASIC, and SoC designs. Silicon Canvas' custom layout solutions provide more automation and high performance capabilities to any design projects, which require the use of a more effective full custom layout solution, including but not limited to the layout creation for analog, mixed signals, and test key designs. Customers' applications include processors, computing systems, networking, telecommunication and graphics.
Silicon Canvas, Inc. is located in San Jose, California. For more information, you can visit our website at www.sicanvas.com, send an email to info@sicanvas.com or call us at (408) 392-0288.
For more information, contact:
Hau Yung Chen
Silicon Canvas, Inc.
(408) 392-0288
hchen@sicanvas.com
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